Display device

ABSTRACT

A display device includes a pixel electrode, a switching element connected to the pixel electrode, a pixel line connected to the switching element and disposed adjacent to the pixel electrode, and a light-transmitting shielding portion made of a conductive film having light-transmitting and disposed adjacent to both the pixel electrode and the pixel line.

CROSS-REFERENCE TO RELATED APPLICATION

The present application claims priority to U.S. Provisional ApplicationSer. No. 62/819,705, filed Mar. 18, 2019, the content to which is herebyincorporated by reference into this application.

BACKGROUND OF THE INVENTION Field of the Invention

The present disclosure relates to a display device.

Description of the Related Art

As an example of a display device in the prior art, there is known thedisplay device described in Japanese Unexamined Patent ApplicationPublication No. 2007-79568. The display device described in JapaneseUnexamined Patent Application Publication No. 2007-79568 includes asubstrate made of insulator, a plurality of gate lines formed on thesubstrate, a plurality of data lines intersecting the plurality of gatelines, a plurality of thin film transistors, a gate and a source of eachof the plurality of thin film transistors are respectively connected toa gate line of the plurality of gate lines and a data line of theplurality of data lines, and a plurality of pixel electrodes having arectangular shape, each connected to a drain of a thin film transistorof the plurality of thin film transistors, arranged in a matrix, andincluding a first side parallel to a gate line of the plurality of gatelines and a second side shorter than the first side and parallel to adata line of the plurality of data lines. The pixel electrodes adjacentto each other in a column direction are connected to data linesdifferent from each other.

SUMMARY OF THE INVENTION

In the display device set forth in Japanese Unexamined PatentApplication Publication No. 2007-79568 described above, each of thepixel electrodes overlaps a storage electrode line including a storageelectrode, thereby forming a storage capacitor that enhances a voltagestoring capacity of a liquid crystal capacitor. In particular, a stem ofthe storage electrode line traverses longitudinally across a center ofthe pixel electrode, and top and bottom boundaries of the pixelelectrode are positioned on the storage electrodes extending to theright and left from the stem. When the storage electrode lines are thusarranged, electromagnetic interference formed between the gate lines andthe pixel electrodes is blocked by the storage electrodes, therebystably maintaining the voltage of the pixel electrodes. However, thestorage electrode line described above is constituted by a metal filmhaving a light-blocking property, and there is concern that, with thestorage electrode partially overlapping the pixel electrode, the amountof transmitted light of the pixel electrode is decreased and luminancereduction is generated.

One aspect of the present disclosure has been completed on the basis ofthe circumstances described above, and an object of the presentdisclosure is to block an electrical field while suppressing a luminancereduction.

(1) An embodiment of the present disclosure is a display deviceincluding a pixel electrode, a switching element connected to the pixelelectrode, a pixel line connected to the switching element and disposedadjacent to the pixel electrode, and a light-transmitting shieldingportion made of a conductive film having light-transmitting and disposedadjacent to both the pixel electrode and the pixel line.

(2) Further, in an embodiment of the present disclosure, in addition tothe configuration of (1) described above, in the display device, theswitching element includes at least a channel region made of a portionof a semiconductor film, and the light-transmitting shielding portion isformed by reducing a resistance of a portion of the semiconductor film,the portion being different from the channel region.

(3) Further, in an embodiment of the present disclosure, in addition tothe configuration of (1) or (2) described above, in the display device,the pixel line is disposed aligned with the pixel electrode with aninterval between the pixel line and the pixel electrode, and thelight-transmitting shielding portion includes a non-overlapping portioninterposed between and not overlapping the pixel electrode and the pixelline in an alignment direction of the pixel electrode and the pixelline.

(4) Further, in an embodiment of the present disclosure, in addition toany one of the configurations of (1) to (3) described above, in thedisplay device, the light-transmitting shielding portion includes apixel electrode overlapping portion overlapping an edge portion of thepixel electrode with an insulating film interposed between the pixelelectrode overlapping portion and the edge portion of the pixelelectrode.

(5) Further, in an embodiment of the present disclosure, in addition toany one the configurations of (1) to (4) described above, in the displaydevice, the light-transmitting shielding portion includes a pixel lineoverlapping portion overlapping an edge portion of the pixel line withan insulating film interposed between the pixel line overlapping portionand the edge portion of the pixel line.

(6) Further, in an embodiment of the present disclosure, in addition tothe configuration of (5) described above, in the display device, theswitching element includes at least a channel region made of a portionof a semiconductor film disposed on an upper layer side of the pixelline with an insulating film interposed between the channel region andthe pixel line, and the light-transmitting shielding portion is formedby reducing a resistance of a portion of the semiconductor film, theportion being different from the channel region.

(7) Further, in an embodiment of the present disclosure, in addition toany one of the configurations of (1) to (6) described above, in thedisplay device, the pixel electrode has a longitudinal shape, and thepixel line and the light-transmitting shielding portion extend along anedge portion on a longitudinal side of the pixel electrode.

(8) Further, in an embodiment of the present disclosure, in addition tothe configuration of (7) described above, in the display device, thepixel electrode includes a bent portion at a middle of the pixelelectrode in a longitudinal direction, and the pixel line and thelight-transmitting shielding portion are bent along the bent portion.

(9) Further, in an embodiment of the present disclosure, in addition tothe configuration of (7) or (8) described above, the display devicefurther includes a second pixel line extending in a short-hand directionof the pixel electrode, and the switching element includes a first gateelectrode connected to the pixel line, a channel region disposedoverlapping the first gate electrode on an upper layer side with a firstgate insulating film interposed between the channel region and the firstgate electrode and made of a semiconductor film, a second gate electrodedisposed overlapping the channel region on an upper layer side with thesecond gate insulating film interposed between the second gate electrodeand the channel region and connected to the first gate electrode, asource region connected to a first end portion of the channel region andthe second pixel line, and a drain region connected to a second endportion of the channel region and the pixel electrode.

(10) Further, in an embodiment of the present disclosure, in addition tothe configuration of (9) described above, in the display device, thesecond pixel line is disposed with an insulating film interposed betweenthe second pixel line and the second gate electrode, and is made of anconductive film different from that of the second gate electrode.

(11) Further, in an embodiment of the present disclosure, in addition tothe configuration of (9) described above, in the display device, thesecond pixel line is made of the conductive film same as that of thesecond gate electrode.

(12) Further, in an embodiment of the present disclosure, in addition tothe configuration of any one of (1) to (11) described above, the displaydevice further includes a common electrode overlapping the pixelelectrode with an insulating film interposed between the commonelectrode and the pixel electrode, and the light-transmitting shieldingportion is connected to the common electrode.

(13) Further, in an embodiment of the present disclosure, in addition tothe configuration of any one of (1) to (12) described above, the displaydevice further includes a second shielding portion disposed at leastpartly overlapping the light-transmitting shielding portion with aninsulating film interposed between the second shielding portion and thelight-transmitting shielding portion, and made of a conductive film.

(14) Further, in an embodiment of the present disclosure, in addition tothe configuration of (13) described above, in the display device, thesecond shielding portion is constituted by a conductive film havinglight-blocking properties, and includes a light-blocking pixel lineoverlapping portion overlapping an edge portion of the pixel line withan insulating film interposed between the light-blocking pixel lineoverlapping portion and the edge portion of the pixel line, and thelight-transmitting shielding portion includes a light-transmitting pixelelectrode overlapping portion overlapping an edge portion of the pixelelectrode with an insulating film interposed between thelight-transmitting pixel electrode overlapping portion and the edgeportion of the pixel electrode.

(15) Further, in an embodiment of the present disclosure, in addition tothe configuration of (13) or (14) described above, the display devicefurther includes a common electrode overlapping the pixel electrode withan insulating film interposed between the common electrode and the pixelelectrode, and an intermediate electrode disposed overlapping the commonelectrode and the light-transmitting shielding portion via differentinsulating films and connected to each of the common electrode and thelight-transmitting shielding portion through a contact hole formed ineach of the insulating films. The second shielding portion is made ofthe conductive film same as that of the intermediate electrode, and iscoupled to the intermediate electrode.

According to one aspect of the present disclosure, it is possible toblock an electrical field while suppressing a luminance reduction.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a cross-sectional view of a liquid crystal panel according toa first embodiment of the present disclosure.

FIG. 2 is a plan view illustrating a pixel arrangement in an arraysubstrate and a CF substrate constituting the liquid crystal panel.

FIG. 3 is a cross-sectional view of the liquid crystal panel taken alongline A-A of FIG. 2.

FIG. 4 is a cross-sectional view of the liquid crystal panel taken alongline B-B of FIG. 2.

FIG. 5 is a plan view mainly illustrating a pattern of a secondtransparent electrode film provided to the array substrate.

FIG. 6 is a plan view mainly illustrating a pattern of a first metalfilm and a third metal film provided to the array substrate.

FIG. 7 is a plan view mainly illustrating a pattern of a semiconductorfilm and a fourth metal film provided to the array substrate.

FIG. 8 is a plan view mainly illustrating a pattern of a second metalfilm provided to the array substrate.

FIG. 9 is a cross-sectional view of the array substrate taken along lineC-C of FIG. 2.

FIG. 10 is a cross-sectional view of the array substrate taken alongline D-D of FIG. 2.

FIG. 11 is a cross-sectional view of the array substrate taken alongline E-E of FIG. 2.

FIG. 12 is a cross-sectional view of the array substrate taken alongline F-F of FIG. 2.

FIG. 13 is a cross-sectional view of the array substrate taken alongline G-G of FIG. 2.

FIG. 14 is a plan view mainly illustrating a pattern of the third metalfilm provided to the array substrate constituting the liquid crystalpanel according to a second embodiment of the present disclosure.

FIG. 15 is a plan view mainly illustrating a pattern of thesemiconductor film provided to the array substrate.

FIG. 16 is a cross-sectional view of the array substrate taken alongline F-F of FIG. 14.

FIG. 17 is a plan view mainly illustrating a pattern of the second metalfilm provided to the array substrate constituting the liquid crystalpanel according to a third embodiment of the present disclosure.

FIG. 18 is a cross-sectional view of the array substrate taken alongline D-D of FIG. 17.

FIG. 19 is a cross-sectional view of the array substrate taken alongline E-E of FIG. 17.

DETAILED DESCRIPTION OF THE INVENTION First Embodiment

The first embodiment of the present disclosure will be described withreference to FIG. 1 to FIG. 13. In the present embodiment, a liquidcrystal display device 10 is exemplified. Note that the X axis, the Yaxis, and the Z axis are illustrated in a part of each drawing, and eachaxial direction is illustrated to be the direction illustrated in eachdrawing. Further, an upper side and a lower side in FIG. 3, FIG. 4, FIG.9, FIG. 10, FIG. 11, FIG. 12, and FIG. 13 are a front side and a rearside, respectively.

FIG. 1 is a schematic plan view of a liquid crystal panel 11. The liquidcrystal display device 10, as illustrated in FIG. 1, includes at leastthe liquid crystal panel (display device, display panel) 11 that has ahorizontally elongated rectangular shape and is capable of displaying animage, and a backlight device (illumination device), which is anexternal light source configured to irradiate the liquid crystal panel11 with light for use in display. In the present embodiment, the liquidcrystal panel 11 has, for example, a screen size of about 15 inches(specifically, 15.6 inches), and a resolution equivalent to “full highdefinition (FHD)”. The backlight device includes a light source (forexample, a light emitting diode (LED) or the like) disposed on a rearside (back face side) of the liquid crystal panel 11 and configured toemit light having a white color (white light), an optical memberconfigured to impart an optical effect on the light from the lightsource, thereby converting the light into planar light, and the like.

In the liquid crystal panel 11, as illustrated in FIG. 1, a centerportion of a screen is established as a display region (range surroundedby a dot-dash line in FIG. 1) AA in which images are displayed. Incontrast, a frame-shaped outer peripheral portion surrounding thedisplay region AA of the screen of the liquid crystal panel 11 is anon-display region NAA in which images are not displayed. In the presentembodiment, a long side dimension of the display region AA is 345.6 mm,for example, and a short side dimension is 194.4 mm, for example. Theliquid crystal panel 11 is formed by bonding a pair of substrates 20 and21 together. A front side (front face side) of the pair of substrates 20and 21 is the color film (CF) substrate (counter substrate) 20, and arear side (back face side) is the array substrate (active matrixsubstrate, element substrate) 21. The CF substrate 20 and the arraysubstrate 21 are each formed by layering various films on an innersurface side of the glass substrate. Note that polarizers are bonded toouter face sides of both the substrates 20 and 21, respectively.

The CF substrate 20, as illustrated in FIG. 1, has a short sidedimension that is shorter than a short side dimension of the arraysubstrate 21, and is bonded to the array substrate 21 with one endportion in a short side direction (Y-axis direction) aligned with thearray substrate 21. Accordingly, the other end portion in the short sidedirection of the array substrate 21 is a CF substrate non-overlappingportion 21A protruding laterally relative to the CF substrate 20 and notoverlapping the CF substrate 20. A driver (second signal supplyingportion) 12 and a flexible substrate (signal transmitting portion) 13are mounted to this CF substrate non-overlapping portion 21A. The driver12 is constituted by a large-scale integration (LSI) chip including adrive circuit in an interior thereof, is chip-on-glass (COG) mounted tothe array substrate 21, and processes various signals transmitted by theflexible substrate 13. In the present embodiment, in the non-displayregion NAA of the liquid crystal panel 11, four of the drivers 12 aredisposed aligned and intervals therebetween in the X-axis direction. Theflexible substrate 13 has a configuration in which a line patternincluding a plurality of lines are formed on a substrate made of asynthetic resin material (for example, a polyimide resin or the like)having insulating properties and flexibility. The flexible substrate 13is connected to the non-display region NAA of the liquid crystal panel11 at one end side, and connected to a control substrate (signal supplysource) at the other end side. Various signals supplied from the controlsubstrate are transmitted to the liquid crystal panel 11 via theflexible substrate 13 and outputted to the display region AA after beingprocessed by the drivers 12 in the non-display region NAA. Further, inthe non-display region NAA of the array substrate 21, a pair of gatecircuit portions (signal supplying portions) 14 are provided sandwichingthe display region AA from both sides in the X-axis direction. The gatecircuit portions 14 are each configured to supply a scanning signal to agate line 26 described later, and monolithically provided to the arraysubstrate 21.

FIG. 2 is a plan view of the display region AA of the array substrate 21and the CF substrate 20 constituting the liquid crystal panel 11. Asillustrated in FIG. 2, a thin film transistor (TFT; switching element)23 and a pixel electrode 24 are provided on an inner surface side of thedisplay region AA of the array substrate 21 constituting the liquidcrystal panel 11. A plurality of the TFTs 23 and the pixel electrodes 24are provided in a matrix shape with intervals therebetween in the X-axisdirection and the Y-axis direction. A gate line (pixel line, scanningline) 26 and a source line (second pixel line, signal line, data line)27 orthogonal to (intersecting) each other are provided around the TFTs23 and the pixel electrodes 24. While the gate line 26 extends almostalong in the X-axis direction, the source line 27 extends almost alongin the Y-axis direction. In the present embodiment, the resolution ofthe liquid crystal panel 11 is equivalent to “FHD”, three-color colorfilters 28 are configured so that those of different colors are arrangedrepeatedly along the source line 27 (Y-axis direction) as describedlater, and thus the number of installations of the gate line 26 is“1080×3=3240” and the number of installations of the source line 27 is“1920”. The gate line 26 and the source line 27 are respectivelyconnected to a first gate electrode 23A as well as a second gateelectrode 23E and a source region 23B of the TFT 23, and the pixelelectrode 24 is connected to a drain region 23C of the TFT 23. The TFT23 is driven on the basis of various signals respectively supplied tothe gate line 26 and the source line 27 and, with the driving of the TFT23, the supply of electrical potential to the pixel electrode 24 iscontrolled. Further, the TFT 23 is disposed adjacent to one side (leftside in FIG. 2) in the X-axis direction of the pixel electrode 24 to beconnected. Further, a spacer SP for maintaining an interval between thepair of substrates 20 and 21 is provided in each position of the CFsubstrate 20 that overlaps the source line 27 of the array substrate 21and is offset to an upper side illustrated in FIG. 2 relative to the TFT23.

The pixel electrode 24, as illustrated in FIG. 2, has a horizontallylong shape in plan view, with a longitudinal direction thereof matchingthe X-axis direction and a short-hand direction thereof matching theY-axis direction. A ratio of a longitudinal dimension to a short-handdimension of the pixel electrode 24 is 3. The gate line 26 and the likeare interposed between the pixel electrodes 24 adjacent to each other inthe short-hand direction (Y-axis direction) while the source line 27 andthe like are interposed between the pixel electrodes 24 adjacent to eachother in the longitudinal direction (X-axis direction). The pixelelectrodes 24 are each disposed with a side edge portion on alongitudinal side adjacent to the gate line 26 with a predeterminedinterval therebetween in the Y-axis direction, and with a side edgeportion on a short-hand side adjacent to the source line 27 with apredetermined interval therebetween in the X-axis direction. Then, thepixel electrodes 24 each have a planar shape that is a bent shape with abent portion 24A at a middle in the longitudinal direction.Specifically, the pixel electrodes 24 are each slightly inclinedrelative to the X-axis direction at both side edge portions in thelongitudinal direction thereof, and bent once at a substantially centralposition, thereby forming a shallow V-shape in which the apex angle isan obtuse angle The pixel electrodes 24 each include the bent portion24A in a substantially central position in the longitudinal directionand have a planar shape in which two generally parallelogram portionsare connected, making the shape generally line symmetric relative to avirtual centerline extending in the short-hand direction through thebent portion 24A. The bent portion 24A is positioned at a joining pointof the two generally parallelogram portions described above, and forms astraight line connecting the bending points at both side edge portionson the longitudinal side of the pixel electrode 24 in the short-handdirection of the pixel electrode 24. The gate line 26 interposed betweenthe pixel electrodes 24 adjacent in the short-hand direction is parallelto the side edge portions on the longitudinal sides of the pixelelectrodes 24, and is repeatedly bent in a zigzag manner following alongthe side edge portion on the longitudinal sides of the pixel electrodes24. The arrangement interval of the gate line 26 is about the same asthe short-hand dimension of the pixel electrode 24, and the arrangementinterval of the source line 27 is about the same as the longitudinaldimension of the pixel electrode 24. Accordingly, compared to when apixel electrode is given a longitudinally long shape, the arrangementinterval of the source line 27 is about the ratio of the short-handdimension of the pixel electrode 24 divided by the longitudinaldimension (for example, approximately ⅓), and thus the number ofinstallations of the source line 27 per unit length in the X-axisdirection is about the same as the ratio described above (approximately⅓, for example). Note that, compared to when a pixel electrode is givena longitudinally long shape, the arrangement interval of the gate line26 is about the ratio of the longitudinal dimension of the pixelelectrode 24 divided by the short-hand dimension (for example,approximately 3), and thus the number of installations of the gate line26 per unit length in the X-axis direction is about the same as theratio described above (approximately 3, for example). This makes itpossible to reduce the number of installations of the source line 27,and thus the number of image signals supplied to the source lines 27 isreduced. Note that a black matrix (inter-pixel light blocking portion)29 illustrated by a two-dot chain line in FIG. 2 is formed on the CFsubstrate 20 side. The black matrix 29 has a planar shape that issubstantially a lattice pattern, partitioning the areas between theadjacent pixel electrodes 24, and includes a pixel opening 29A at aposition overlapping a large portion of the pixel electrode 24 in planview. This pixel opening 29A allows the transmitted light of the pixelelectrode 24 to be emitted outside the liquid crystal panel 11. Theblack matrix 29 is disposed overlapping at least the TFT 23, the gateline 26, and the source line 27 (also including a common line 30described later) on the array substrate 21 side, in plan view.

FIG. 3 is a cross-sectional view of the liquid crystal panel 11 near acenter portion of a pixel portion PX in the Y-axis direction. FIG. 4 isa cross-sectional view of the liquid crystal panel 11 near a centerportion of the pixel portion PX in the X-axis direction. As illustratedin FIG. 3 and FIG. 4, the liquid crystal panel 11 includes a liquidcrystal layer (medium layer) 22 that is disposed between the pair ofsubstrates 20 and 21 and containing liquid crystal molecules, which aresubstances having optical characteristics that change in accordance withapplication of an electrical field. The three-color color filters 28exhibiting blue (B), green (G), and red (R) are provided to the displayregion AA on an inner face side of the CF substrate 20 constituting theliquid crystal panel 11. A plurality of the color filters 28 arearranged in alignment in a matrix shape in the X-axis direction and theY-axis direction, overlapping the pixel electrodes 24 on the arraysubstrate 21 side in plan view. The color filters 28 are arranged sothat those exhibiting mutually different colors are repeatedly alignedalong the source lines 27 (Y-axis direction), and those exhibiting thesame color are continuously aligned along the gate lines 26 (X-axisdirection). In this liquid crystal panel 11, the R, G, and B colorfilters 28 aligned in the Y-axis direction and three pixel electrodes 24facing each of the color filters 28 respectively constitute thethree-color pixel portion PX. Then, in this liquid crystal panel 11 areconfigured display pixels capable of color display with predeterminedgradation by the R, G, and B three-color pixel portions PX adjacent toeach other in the Y-axis direction. An arrangement pitch of the pixelportions PX in the Y-axis direction is, for example, about 60 μm, and anarrangement pitch of the pixel portions PX in the X-axis direction isabout 180 μm, for example. The black matrix 29 is disposed partitioningthe area between the color filters 28 facing the adjacent pixelelectrodes 24. A flattening film OC disposed in a solid manner acrosssubstantially the entire region of the CF substrate 20 is provided onthe upper layer side (liquid crystal layer 22 side) of the color filters28. Note that alignment films for aligning the liquid crystal moleculesincluded in the liquid crystal layer 22 are respectively formed oninnermost faces of both of the substrates 20 and 21 that are in contactwith the liquid crystal layer 22.

Next, a common electrode 25 will be described with reference to FIG. 2to FIG. 5. FIG. 5 is a plan view illustrating a pattern of the commonelectrode 25 (second transparent electrode film 44 described later)provided to the array substrate 21. In FIG. 5, the second transparentelectrode film 44 is illustrated in shaded. On the inner face side ofthe display region AA of the array substrate 21, as illustrated in FIG.2 to FIG. 5, the common electrode 25 is formed on the upper layer sideof the pixel electrodes 24 in a manner that overlaps all of the pixelelectrodes 24. The common electrode 25 is supplied with a substantiallyconstant common potential (reference potential) by the common line 30,and extends across substantially the entire display region AA. Thecommon line 30 overlaps the gate line 26 and the source line 27described above in the display region AA in plan view, and is generallyrouted and formed in a substantially lattice pattern. A lead-out portionof the common line 30 led out to the non-display region NAA is connectedto the flexible substrate 13, and thus the common line 30 is suppliedwith a common potential from the flexible substrate 13. A plurality ofpixel overlapping openings (pixel overlapping slits, alignment controlslits) 25A extending in the longitudinal direction of each pixelelectrode 24 are formed in a portion of the common electrode 25overlapping each pixel electrode 24. The pixel overlapping openings 25Aare each parallel to the side edge portion on the longitudinal side ofthe pixel electrode 24 and bend at a middle (substantially at a centralposition). Note that the specific installation quantity, shape,formation range and the like of the pixel overlapping opening 25A can bechanged as appropriate to other than those illustrated. When a potentialdifference is generated as the pixel electrodes 24 are charged betweenthe pixel electrodes 24 and the common electrodes 25 overlapping eachother, a fringe electrical field (oblique electrical field) including acomponent along a plate surface of the array substrate 21 as well as acomponent in a direction normal to the plate surface of the arraysubstrate 21 is generated between opening edges of the pixel overlappingopenings 25A and the pixel electrodes 24. Accordingly, by using thisfringe electrical field, it is possible to control the alignment stateof the liquid crystal molecules included in the liquid crystal layer 22,and a predetermined display is formed on the basis of the alignmentstate of the liquid crystal molecules. In other words, the operationmode of the liquid crystal panel 11 according to the present embodimentis a fringe field switching (FFS) mode.

The configuration of the TFT 23 will be described in detail withreference to FIG. 6 to FIG. 8. FIG. 6 is a plan view illustrating apattern of the first gate electrode 23A, the gate line 26, the sourceline 27, and the like (first metal film 32 and third metal film 38described later) of the TFT 23 provided to the array substrate 21. InFIG. 6, the first metal film 32 and the third metal film 38 areillustrated in shaded. FIG. 7 is a plan view illustrating a pattern of achannel region 23D and the like (semiconductor film 34 described later)of the TFT 23 provided to the array substrate 21. In FIG. 7, thesemiconductor film 34 is illustrated in shaded. FIG. 8 is a plan viewillustrating a pattern of the second gate electrode 23E (second metalfilm 36 described later) of the TFT 23 provided to the array substrate21. In FIG. 8, the second metal film 36 is illustrated in shaded. Asillustrated in FIG. 6, the TFT 23 includes the first gate electrode(lower layer side gate electrode) 23A made of a portion of the gate line26. The first gate electrode 23A is made of a portion of the gate line26 intersecting the channel region 23D. A scanning signal transmitted tothe gate line 26 is supplied to the first gate electrode 23A. The TFT 23includes the source region 23B connected to the source line 27, asillustrated in FIG. 6 and FIG. 7. The source line 27 includes a sourceline widened portion 27A that projects, from a position on a side (lowerside illustrated in FIG. 6) opposite to the pixel electrode 24 to beconnected in the Y-axis direction to the area intersecting the gate line26, to the pixel electrode 24 side (right side illustrated in FIG. 6) tobe connected in the X-axis direction. The source region 23B issubstantially L-shaped in plan view, and a portion thereof extending inthe X-axis direction is connected to the source line widened portion 27Adescribed above. The TFT 23, as illustrated in FIG. 7, includes thedrain region 23C disposed with an interval from the source region 23B inthe Y-axis direction. The drain region 23C is connected to the pixelelectrode 24 at an end portion on a side opposite to the source region23B (channel region 23D) side. The TFT 23 includes the channel region23D disposed overlapping the first gate electrode 23A on the upper layerside and continuous to the source region 23B and the drain region 23C.Similar to the first gate electrode 23A, the channel region 23D has ahorizontally elongated quadrilateral shape in plan view, a first endportion (lower end portion illustrated in FIG. 7) in the Y-axisdirection is coupled to a portion of the source region 23B extending inthe Y-axis direction, and a second end portion (upper end portionillustrated in FIG. 7) is coupled to the drain region 23C.

The TFT 23 includes the second gate electrode (lower layer side gateelectrode) 23E disposed overlapping the channel region 23D on the upperlayer side, as illustrated in FIG. 8. Similar to the first gateelectrode 23A and the channel region 23D, the second gate electrode 23Ehas a horizontally elongated quadrilateral shape in plan view. Thesecond gate electrode 23E is electrically connected to the first gateelectrode 23A, and thus the scanning signal transmitted to the gate line26 is supplied at the same timing as to the first gate electrode 23A.The channel region 23D is thus configured to be sandwiched between thelower layer side and the upper layer side in the Z-axis direction by thefirst gate electrode 23A and the second gate electrode 23E, making itpossible to increase a drain current flowing into the channel region 23Dcompared to when only one gate electrode is disposed overlapping thechannel region 23D. As a result, the pixel electrode 24 can besufficiently charged even when the charging time of the pixel electrode24 charged by the TFT 23 is reduced in association with an increase inthe number of installations of the gate line 26.

The various films layered and formed on the inner surface side of thearray substrate 21 will now be described with reference to FIG. 9 toFIG. 11. FIG. 9 to FIG. 11 are each a cross-sectional view of the arraysubstrate 21 near the TFT 23. As illustrated in FIG. 9 to FIG. 11, inthe array substrate 21, the first metal film (conductive film) 32, afirst gate insulating film (lower layer side gate insulating film) 33,the semiconductor film 34, a second gate insulating film (upper layerside gate insulating film) 35, the second metal film (conductive film)36, a first interlayer insulating film (insulating film) 37, the thirdmetal film (conductive film) 38, a second interlayer insulating film(insulating film) 39, a flattening film (insulating film) 40, a fourthmetal film (conductive film) 41, a first transparent electrode film 42,an inter-electrode insulating film (insulating film) 43, and the secondtransparent electrode film 44 are layered in this order from the lowerlayer side (glass substrate side).

The first metal film 32, the second metal film 36, the third metal film38, and the fourth metal film 41 are each a single layer film made ofone type of metal material selected from copper, titanium, aluminum,molybdenum, tungsten, and the like, or a layered film or alloy made of adifferent types of metal materials, and thus have conductivity andlight-blocking properties. The first metal film 32, as illustrated inFIG. 9 and FIG. 11, constitutes the gate line 26, the first gateelectrode 23A of the TFT 23, and the like. The second metal film 36constitutes the second gate electrode 23E of the TFT 23, and the like.The third metal film 38 constitutes the source line 27 as illustrated inFIG. 10 and constitutes a pixel intermediate electrode 31 connected toboth the drain region 23C and the pixel electrode 24 as illustrated inFIG. 9. The pixel electrode 24 is connected to the drain region 23C byinterposing this pixel intermediate electrode 31 and thus, compared towhen the pixel electrode is directly connected to the drain region 23C,failure such as film breakage or the like is not readily generated inthe pixel electrode 24, resulting in high connection reliability. Thefourth metal film 41 constitutes the common line 30 and the like. Thefirst transparent electrode 42 and the second transparent electrode 44are made of a transparent electrode material (for example, indium tinoxide (ITO), indium zinc oxide (IZO), and the like). The firsttransparent electrode film 42 constitutes the pixel electrodes 24 andthe like. The second transparent electrode film 44 constitutes thecommon electrode 25 and the like.

The semiconductor film 34 is an oxide semiconductor film employing anoxide semiconductor, for example, as a material, and haslight-transmitting. The semiconductor film 34 constitutes the sourceregion 23B, the drain region 23C, the channel region 23D, and the likeconstituting the TFT 23. Examples of specific materials of thesemiconductor film 34 include an In—Ga—Zn—O based semiconductor (forexample, indium gallium zinc oxide). Here, the In—Ga—Zn—O basedsemiconductor is a ternary oxide of indium (In), gallium (Ga), and zinc(Zn), and a ratio (compositional ratio) of the In, Ga, and Zn is notparticularly limited. For example, the ratio includes In:Ga:Zn=2:2:1,In:Ga:Zn=1:1:1, or In:Ga:Zn=1:1:2, but is not necessarily limitedthereto. While the In—Ga—Zn—O based semiconductor may be amorphous orcrystalline, when employing a crystalline, the crystalline In—Ga—Zn—Obased semiconductor in which a c-axis is oriented substantiallyperpendicular to a layer surface is preferable. Here, in thesemiconductor film 34 described above, a portion (the portion in whichthe second metal film 36 is non-overlapping) is made to have a reducedresistance in the manufacturing process, and thus the semiconductor film34 is constituted by a reduced resistance region and a non-reducedresistance region. Specifically, the semiconductor film 34, after beingpatterned to form a predetermined planar shape, is subjected to aresistance reduction treatment with the second gate insulating film 35and the second metal film 36 layered and formed on the upper layer sideserving as masks. Of the semiconductor film 34, a portion exposedwithout being covered by the second metal film 36 (a portion notoverlapping the second metal film 36) is the reduced resistance region,and a portion covered by the second metal film 36 (a portion overlappingthe second metal film 36) is the non-reduced resistance region. Notethat, in FIG. 4, FIG. 9, FIG. 10, FIG. 12, and FIG. 13, the reducedresistance region of the semiconductor film 34 is illustrated in shaded.The reduced resistance region of the semiconductor film 34 has anextremely low resistivity of, for example, from about 1/10000000000 to1/100 compared to the non-reduced resistance region, and functions as aconductor. The reduced resistance region of the semiconductor film 34constitutes the source region 23B, the drain region 23C, and the like ofthe TFT 23. The non-reduced resistance region of the semiconductor film34 is capable of charge transfer only under specific conditions (when ascanning signal is supplied to each of the gate electrodes 23A and 23E),while the reduced resistance region is always capable of charge transferand functions as a conductor. The non-reduced resistance region of thesemiconductor film 34 constitutes the channel region 23D of the TFT 23.

The first gate insulating film 33, the second gate insulating film 35,the first interlayer insulating film 37, the second interlayerinsulating film 39, and the inter-electrode insulating film 43 are eachmade of an inorganic material such as silicon nitride (SiN_(x)) orsilicon oxide (SiO₂). The flattening film 40 is made of an organicmaterial such as polymethyl methacrylate (PMMA; acrylic resin), forexample, and has a film thickness greater than those of the otherinsulating films 33, 35, 37, 38 and 43 made of inorganic material. Thisflattening film 40 flattens the surface of the array substrate 21. Asillustrated in FIG. 9 to FIG. 11, the first gate insulating film 33keeps the first metal film 32 on the lower layer side and thesemiconductor film 34 on the upper layer side in an insulated state. Inparticular, the interval between the first gate electrode 23A and thechannel region 23D is kept constant by a portion of the first gateinsulating film 33 overlapping the first gate electrode 23A. The secondgate insulating film 35 keeps the semiconductor film 34 on the lowerlayer side and the second metal film 36 on the upper layer side in aninsulated state. In particular, the interval between the second gateelectrode 23E and the channel region 23D is kept constant by a portionof the second gate insulating film 35 overlapping the second gateelectrode 23E. The second gate insulating film 35 is patterned alongwith the second metal film 36 disposed on the upper layer side, and hasa formation range overlapping substantially the entire region of thesecond metal film 36 (excluding a gate contact hole CH4 describedlater). The first interlayer insulating film 37 keeps the second metalfilm 36 on the lower layer side and the third metal film 38 on the upperlayer side in an insulated state. The second interlayer insulating film39 and the flattening film 40 keep the third metal film 38 on the lowerlayer side, and the fourth metal film 41 and the first transparentelectrode 42 on the upper layer side in an insulated state. Theinter-electrode insulating film 43 keeps the first transparent electrodefilm 42 on the lower layer side and the second transparent electrodefilm 44 on the upper layer side in an insulated state.

As illustrated in FIG. 9, a first pixel contact hole CH1 for connectingthe pixel intermediate electrode 31 to the drain region 23C is formed ina position of the first interlayer insulating film 37 overlapping boththe drain region 23C and the pixel intermediate electrode 31. A secondpixel contact hole CH2 for connecting the pixel electrode 24 to thepixel intermediate electrode 31 is formed in respective positions of thesecond interlayer insulating film 39 and the flattening film 40overlapping both the pixel electrode 24 and the pixel intermediateelectrode 31. The drain region 23C and the pixel electrode 24 areconnected to the pixel intermediate electrode 31 through these pixelcontact holes CH1 and CH2, respectively. The pixel intermediateelectrode 31 is disposed covering, from the upper layer side, theportion of the drain region 23C made of the semiconductor film 34 thatis facing the first pixel contact hole CH1, making it possible toprevent the drain region 23C from being over-etched when the fourthmetal film 41 is etched through a patterned photoresist. Further, asillustrated in FIG. 10, a source contact hole CH3 for connecting thesource line widened portion 27A to the source region 23B is formed in aposition of the first interlayer insulating film 37 overlapping both thesource line widened portion 27A of the source line 27 and the sourceregion 23B. In addition, as illustrated in FIG. 11, the gate contacthole CH4 for connecting the second gate electrode 23E to the first gateelectrode 23A is formed in positions of the first gate insulating film33 and the second gate insulating film 35 overlapping both the firstgate electrode 23A and the second gate electrode 23E and not overlappingthe channel region 23D.

As illustrated in FIG. 7 and FIG. 12, the array substrate 21 accordingto the present embodiment is provided with a light-transmittingshielding portion 45 disposed adjacent to both the pixel electrode 24and the gate line 26. FIG. 12 is a cross-sectional view of the arraysubstrate 21 near the light-transmitting shielding portion 45. Thelight-transmitting shielding portion 45 is made of the reducedresistance region of the semiconductor film (conductive film) 34 and isalways capable of being conductive. Accordingly, the light-transmittingshielding portion 45 has light-transmitting and electrical conductivity.The light-transmitting shielding portion 45 is electrically connected tothe common electrode 25, which will be described in detail later. Inthis manner, an electrical field generated between the pixel electrode24 and the gate line 26 can be blocked by the light-transmittingshielding portion 45 disposed adjacent to both the pixel electrode 24and the gate line 26. As a result, a parasitic capacitance generatedbetween the pixel electrode 24 and the gate line 26 is suppressed, andthus a reduction in display quality caused by parasitic capacitance issuppressed. In addition, because the light-transmitting shieldingportion 45 is made of the semiconductor film 34 havinglight-transmitting, when, for example, a design is adopted in which aportion of the light-transmitting shielding portion 45 is made tooverlap the pixel electrode 24 or, even with a design in which thelight-transmitting shielding portion 45 does not overlap the pixelelectrode 24, when a portion of the light-transmitting shielding portion45 is disposed overlapping the pixel electrode 24 due to a shift inalignment or the like that is generated during manufacture, the amountof transmitted light of the pixel electrode 24 is less likely todecrease due to the light-transmitting shielding portion 45. This makesit possible to block an electrical field generated between the pixelelectrode 24 and the gate line 26 while suppressing a luminancereduction. Furthermore, the light-transmitting shielding portion 45 isconstituted by the reduced resistance region formed by reducing theresistance of a portion of the semiconductor film 34 constituting thechannel region 23D of the TFT 23 that is different from the channelregion 23D, and thus, during manufacture, these can be patterned usingthe same photomask, which is suitable for reducing the number ofphotomasks used and the like.

As illustrated in FIG. 7 and FIG. 12, the light-transmitting shieldingportion 45 extends in parallel with the side edge portion on thelongitudinal side of the pixel electrode 24 and the gate line 26.Specifically, the light-transmitting shielding portion 45 is bent oncealong the bent portion 24A of the pixel electrode 24 at a substantiallycentral position in the length direction in plan view, and forms ashallow V-shape in which the apex angle is an obtuse angle. Thelight-transmitting shielding portion 45 has a length dimension that issomewhat shorter than the length dimension of the side edge portion onthe longitudinal side of the pixel electrode 24, but is disposedadjacent to a large portion of the side edge portion on the longitudinalside of the pixel electrode 24 (a portion other than both end portionsin the length direction). The light-transmitting shielding portion 45 isdisposed with one end portion in the length direction (X-axis direction)adjacent to the TFT 23, and the other end portion adjacent to a portionof the common line 30 extending along the source line 27 (Y-axisdirection). Further, the light-transmitting shielding portion 45 is alsodisposed adjacent in the Y-axis direction to the portion of the commonline 30 extending along the gate line 26 (X-axis direction). In aconfiguration in which the gate line 26 extends along the side edgeportion on the longitudinal side of the pixel electrode 24 having alongitudinal shape as in the present embodiment, compared to when thegate line extends along the side edge portion on the short-hand side ofthe pixel electrode 24, the parasitic capacitance that may be generatedbetween the side edge portion on the longitudinal side of the pixelelectrode 24 and the gate line 26 tends to be greater. In this regard,the light-transmitting shielding portion 45 extends along the side edgeportion on the longitudinal side of the pixel electrode 24, and thus theelectrical field generated between the side edge portion on thelongitudinal side of the pixel electrode 24 and the gate line 26 isfavorably blocked by the light-transmitting shielding portion 45, and areduction in display quality caused by parasitic capacitance can be moreeffectively suppressed. Further, in a configuration in which the gateline 26 is bent along the bent portion 24A of the pixel electrode 24 asin the present embodiment, compared to when the pixel electrode and thegate line extend linearly without being bent at a middle in thelongitudinal direction, the gate line 26 has an increased creepagedistance parallel to the side edge portion on the longitudinal side ofthe pixel electrode 24, and thus the parasitic capacitance that may begenerated between the side edge portion on the longitudinal side of thepixel electrode 24 and the gate line 26 tends to be even larger. In thisregard, the light-transmitting shielding portion 45 is bent along thebent portion 24A of the pixel electrode 24, and thus the electricalfield generated between the side edge portion on the longitudinal sideof the pixel electrode 24 and the gate line 26 is favorably blocked, anda reduction in display quality caused by parasitic capacitance can beeven more effectively suppressed.

As illustrated in FIG. 7 and FIG. 12, the light-transmitting shieldingportion 45 has a width dimension wider than the interval between thepixel electrode 24 and the gate line 26 aligned in the Y-axis direction.The light-transmitting shielding portion 45 includes a non-overlappingportion 45A interposed between the pixel electrode 24 and the gate line26 in the Y-axis direction (alignment direction of the pixel electrode24 and the gate line 26), being non-overlapping with the pixel electrode24 and the gate line 26 in plan view. The non-overlapping portion 45Ahas a width dimension substantially equal to the interval between thepixel electrode 24 and the gate line 26 aligned in the Y-axis direction.This non-overlapping portion 45A can favorably block an electrical fieldthat may be generated between the pixel electrode 24 and the gate line26 through the space opened between the pixel electrode 24 and the gateline 26. In addition, the light-transmitting shielding portion 45includes a pixel electrode overlapping portion 45B disposed overlappingthe side edge portion on the longitudinal side of the pixel electrode 24in plan view. The pixel electrode overlapping portion 45B made of thesemiconductor film 34 overlaps the side edge portion on the longitudinalside of the pixel electrode 24 made of the first transparent electrodefilm 42 with the first interlayer insulating film 37, the secondinterlayer insulating film 39, and the flattening film 40 interposedtherebetween. In this way, even when there is an electrical field thatmay be generated between the pixel electrode 24 and the gate line 26near the side edge portion on the longitudinal side of the pixelelectrode 24, the electrical field can be favorably blocked by the pixelelectrode overlapping portion 45B overlapping the side edge portion onthe longitudinal side of the pixel electrode 24. Moreover, because thelight-transmitting shielding portion 45 has light-transmitting, theamount of transmitted light of the pixel electrode 24 is less likely todecrease due to the pixel electrode overlapping portion 45B andluminance reduction is suppressed even when the pixel electrodeoverlapping portion 45B overlaps the pixel electrode 24. Further, evenwhen, for example, the light-transmitting shielding portion 45 ispositionally offset away from the pixel electrode 24 in the Y-axisdirection due to a shift in alignment that is generated duringmanufacture or the like, the pixel electrode overlapping portion 45B canblock an electrical field that may be generated in the space openedbetween the pixel electrode 24 and the gate line 26. This increases thereliability of blocking an electrical field that may be generatedbetween the pixel electrode 24 and the gate line 26 by thelight-transmitting shielding portion 45.

Furthermore, the light-transmitting shielding portion 45, as illustratedin FIG. 7 and FIG. 12, includes a gate line overlapping portion (pixelline overlapping portion) 45C disposed overlapping the side edge portionof the gate line 26 in plan view. The gate line overlapping portion 45Cmade of the semiconductor film 34 overlaps the side edge portion of thegate line 26 made of the first metal film 32 with the first gateinsulating film (insulating film) 33 interposed therebetween. In thisway, even when there is an electrical field that may be generatedbetween the gate line 26 and the pixel electrode 24 near the side edgeportion of the gate line 26, the electrical field can be favorablyblocked by the gate line overlapping portion 45C overlapping the sideedge portion of the gate line 26. Further, even when, for example, thelight-transmitting shielding portion 45 is positionally offset away fromthe gate line 26 in the Y-axis direction due to a shift in alignmentthat is generated during manufacture or the like, the gate lineoverlapping portion 45C can block an electrical field that may begenerated in the space opened between the pixel electrode 24 and thegate line 26. This increases the reliability of blocking an electricalfield that may be generated between the pixel electrode 24 and the gateline 26 by the light-transmitting shielding portion 45. Further, thesemiconductor film 34 constituting the light-transmitting shieldingportion 45 is disposed on the upper layer side of the gate line 26 withthe first gate insulating film 34 interposed therebetween, making itpossible to avoid a situation in which the gate line overlapping portion45C of the light-transmitting shielding portion 45 overlapping the sideedge portion of the gate line 26 is no longer reduced in resistance bythe gate line 26.

Next, a connection structure between the light-transmitting shieldingportion 45 and the common electrode 25 will be described. As illustratedin FIG. 6 and FIG. 13, the light-transmitting shielding portion 45 madeof the semiconductor film 34 and the common electrode 25 made of thesecond transparent electrode film 44 are electrically connected byinterposing an intermediate electrode 46 made of the third metal film38. FIG. 13 is a cross-sectional view of the array substrate 21 near theintermediate electrode 46. The intermediate electrode 46 is disposedoverlapping the light-transmitting shielding portion 45 on the upperlayer side with the first interlayer insulating film 37 interposedtherebetween, and overlapping the common electrode 25 on the lower layerside with the second interlayer insulating film 39, the flattening film40, and the inter-electrode insulating film 43 interposed therebetween.Specifically, the intermediate electrode 46 is disposed overlapping anend portion of the light-transmitting shielding portion 45 on a side(right side illustrated in FIG. 6) opposite to the TFT 23 side in thelength direction (X-axis direction) in plan view, and connects that sameend portion to the common electrode 25. A first shielding portioncontact hole (contact hole) CH5 for connecting the intermediateelectrode 46 to the above-described end portion of thelight-transmitting shielding portion 45 is formed in a position of thefirst interlayer insulating film 37 overlapping the intermediateelectrode 46. A second shielding portion contact hole CH6 for connectingthe common electrode 25 to the intermediate electrode 46 is formed inpositions of the second interlayer insulating film 39, the flatteningfilm 40, and the inter-electrode insulating film 43 overlapping theintermediate electrode 46. The common electrode 25 and thelight-transmitting shielding portion 45 are connected to theintermediate electrode 46 through these shielding portion contact holesCH5 and CH6, respectively. The intermediate electrode 46 is disposedcovering, from the upper layer side, the portion of thelight-transmitting shielding portion 45 made of the semiconductor film34 that is facing the first shielding portion contact hole CH5, makingit possible to prevent the light-transmitting shielding portion 45 frombeing over-etched when the fourth metal film 41 is etched through apatterned photoresist. Further, the common electrode 25 and thelight-transmitting shielding portion 45 are connected by interposingthis intermediate electrode 46 and thus, compared to when the commonelectrode is directly connected to the light-transmitting shieldingportion 45, failure such as film breakage or the like is not readilygenerated in the common electrode 25, resulting in high connectionreliability.

Further, as illustrated in FIG. 7 and FIG. 13, the portion of the commonline 30 extending along the source line 27 includes a common linewidened portion 30A partially widened at a position adjacent to thelight-transmitting shielding portion 45. Then, a common line contacthole CH7 for connecting the common electrode 25 to the common linewidened portion 30A is formed in a position of the inter-electrodeinsulating film 43 interposed between the common electrode 25 and thecommon line 30 that is overlapping both the common electrode 25 and thecommon line widened portion 30A.

As described above, the liquid crystal panel (display device) 11 of thepresent embodiment includes the pixel electrode 24, the TFT (switchingelement) 23 connected to the pixel electrode 24, the gate line (pixelline) 26 connected to the TFT 23 and disposed adjacent to the pixelelectrode 24, and the light-transmitting shielding portion 45 that ismade of a semiconductor film (conductive film) 34 havinglight-transmitting and is disposed adjacent to both the pixel electrode24 and the gate line 26.

In this way, a signal for driving the TFT 23 or a signal for chargingthe pixel electrode 24 is transmitted to the gate line 26, and the pixelelectrode 24 is charged in accordance with the driving of the TFT 23.Between the pixel electrode 24 and the gate line 26, a parasiticcapacitance may be generated, and there is a concern that the displayquality may deteriorate due to this parasitic capacitance. For this, thelight-transmitting shielding portion 45 is disposed adjacent to both thepixel electrode 24 and the gate line 26, making it possible to block anelectrical field generated between the pixel electrode 24 and the gateline 26 by the light-transmitting shielding portion 45. As a result, aparasitic capacitance generated between the pixel electrode 24 and thegate line 26 is suppressed, and thus a reduction in display qualitycaused by parasitic capacitance is suppressed. In addition, because thelight-transmitting shielding portion 45 is made of the semiconductorfilm 34 having light-transmitting, when, for example, a design isadopted in which a portion of the light-transmitting shielding portion45 is made to overlap the pixel electrode 24 or, even with a design inwhich the light-transmitting shielding portion 45 does not overlap thepixel electrode 24, when a portion of the light-transmitting shieldingportion 45 is disposed overlapping the pixel electrode 24 due to a shiftin alignment or the like that is generated during manufacture, theamount of transmitted light of the pixel electrode 24 is less likely todecrease due to the light-transmitting shielding portion 45. This makesit possible to block an electrical field generated between the pixelelectrode 24 and the gate line 26 while suppressing a luminancereduction.

Further, the TFT 23 includes at least the channel region 23D made of aportion of a semiconductor film 34, and the light-transmitting shieldingportion 45 is formed by reducing a resistance of a portion of thesemiconductor film 34, the portion being different from the channelregion 23D. In this way, the light-transmitting shielding portion 45formed by reducing the resistance of a portion of the semiconductor film34 different from the channel region 23D is disposed adjacent to boththe pixel electrode 24 and the gate line 26. The light-transmittingshielding portion 45 is made of a portion of the semiconductor film 34constituting the channel region 23D of the TFT 23 that is different fromthe channel region 23D, and thus, during manufacture, these can bepatterned using the same photomask, which is suitable for reducing thenumber of photomasks used and the like.

Further, the gate line 26 is disposed aligned with the pixel electrode24 with an interval therebetween, and the light-transmitting shieldingportion 45 includes the non-overlapping portion 45A interposed betweenand not overlapping the pixel electrode 24 and the pixel line 26 in analignment direction of the pixel electrode 24 and the pixel line 26.When the pixel electrode 24 and the gate line 26 are aligned with aninterval therebetween, there is a possibility that an electrical fieldmay be generated between the pixel electrode 24 and the gate line 26through the space opened between the pixel electrode 24 and the gateline 26. The non-overlapping portion 45A included in thelight-transmitting shielding portion 45 is interposed between and in thealignment direction of the pixel electrode 24 and the gate line 26 anddoes not overlap the pixel electrode 24 or the gate line 26, and thuscan favorably block an electrical field that may be generated in thespace opened between the pixel electrode 24 and the gate line 26.

Further, the light-transmitting shielding portion 45 includes the pixelelectrode overlapping portion 45B overlapping an edge portion of thepixel electrode 24 with the first interlayer insulating film 37, thesecond interlayer insulating film 39, and the flattening film 40(insulating film) interposed therebetween. While there is an electricalfield generated between the pixel electrode 24 and the gate line 26 nearthe edge portion of the pixel electrode 24, the electrical field can befavorably blocked by the pixel electrode overlapping portion 45B of thelight-transmitting shielding portion 45. Moreover, because thelight-transmitting shielding portion 45 has light-transmitting, theamount of transmitted light of the pixel electrode 24 is less likely todecrease and luminance reduction is suppressed even when the pixelelectrode overlapping portion 45B overlaps the pixel electrode 24 withthe first interlayer insulating film 37, the second interlayerinsulating film 39, and the flattening film 40 interposed therebetween.Further, even when, for example, the light-transmitting shieldingportion 45 is positionally offset away from the pixel electrode 24 dueto a shift in alignment that is generated during manufacture or thelike, the pixel electrode overlapping portion 45B can block anelectrical field that may be generated in the space opened between thepixel electrode 24 and the gate line 26. This increases the reliabilityof blocking an electrical field that may be generated between the pixelelectrode 24 and the gate line 26 by the light-transmitting shieldingportion 45.

Further, the light-transmitting shielding portion 45 includes the gateline overlapping portion (pixel electrode overlapping portion) 45Coverlapping an edge portion of the gate line 26 with the first gateinsulating film (insulating film) 33 interposed therebetween. In thisway, while there is an electrical field generated between the gate line26 and the pixel electrode 24 near the edge portion of the gate line 26,the electrical field can be favorably blocked by the gate lineoverlapping portion 45C of the light-transmitting shielding portion 45.Further, even when, for example, the light-transmitting shieldingportion 45 is positionally offset away from the gate line 26 due to ashift in alignment that is generated during manufacture or the like, thegate line overlapping portion 45C can block an electrical field that maybe generated in the space opened between the pixel electrode 24 and thegate line 26. This increases the reliability of blocking an electricalfield that may be generated between the pixel electrode 24 and the gateline 26 by the light-transmitting shielding portion 45.

Further, the TFT 23 includes at least the channel region 23D made of aportion of the semiconductor film 34 disposed on an upper layer side ofthe gate line 26 with the first gate insulating film (insulating film)33 interposed therebetween, and the light-transmitting shielding portion45 is formed by reducing a resistance of a portion of the semiconductorfilm 34, the portion being different from the channel region 23D. Inthis way, the light-transmitting shielding portion 45 formed by reducingthe resistance of a portion of the semiconductor film 34 different fromthe channel region 23D is disposed adjacent to both the pixel electrode24 and the gate line 26. The light-transmitting shielding portion 45 ismade of a portion of the semiconductor film 34 constituting the channelregion 23D of the TFT 23 that is different from the channel region 23D,and thus, during manufacture, these can be patterned using the samephotomask, which is suitable for reducing the number of photomasks usedand the like. Then, the semiconductor film 34 is disposed on the upperlayer side of the gate line 26 with the first gate insulating film 34interposed therebetween, making it possible to avoid a situation inwhich the portion of the light-transmitting shielding portion 45overlapping the edge portion of the gate line 26 is no longer reduced inresistance by the gate line 26.

Further, the pixel electrode 24 has a longitudinal shape, and the gateline 26 and the light-transmitting shielding portion 45 extend along anedge portion on the longitudinal side of the pixel electrode 24. In aconfiguration in which the gate line 26 thus extends along the edgeportion on the longitudinal side of the pixel electrode 24 having alongitudinal shape, compared to when the gate line extends along theedge portion on the short-hand side of the pixel electrode 24, theparasitic capacitance that may be generated between the edge portion onthe longitudinal side of the pixel electrode 24 and the gate line 26tends to be greater. In this regard, the light-transmitting shieldingportion 45 extends along the edge portion on the longitudinal side ofthe pixel electrode 24, and thus the electrical field generated betweenthe edge portion on the longitudinal side of the pixel electrode 24 andthe gate line 26 is favorably blocked, and a reduction in displayquality caused by parasitic capacitance can be more effectivelysuppressed.

Further, the pixel electrode 24 includes the bent portion 24A at amiddle of the pixel electrode 24 in the longitudinal direction, and thegate line 26 and the light-transmitting shielding portion 45 are bentalong the bent portion 24A. In a configuration in which the gate line 26is thus bent along the bent portion 24A of the pixel electrode 24,compared to when the pixel electrode and the gate line extend linearlywithout being bent at a middle in the longitudinal direction, the gateline 26 has an creepage distance parallel to the edge portion on thelongitudinal side of the pixel electrode 24, and thus the parasiticcapacitance that may be generated between the edge portion on thelongitudinal side of the pixel electrode 24 and the gate line 26 tendsto be even larger. In this regard, the light-transmitting shieldingportion 45 is bent along the bent portion 24A of the pixel electrode 24,and thus the electrical field generated between the edge portion on thelongitudinal side of the pixel electrode 24 and the gate line 26 isfavorably blocked, and a reduction in display quality caused byparasitic capacitance can be even more effectively suppressed.

Further, the source line (second pixel line) 27 extending in theshort-hand direction of the pixel electrode 24 is provided, and the TFT23 includes the first gate electrode 23A connected to the gate line 26,the channel region 23D disposed overlapping the first gate electrode 23Aon an upper layer side with the first gate insulating film 33 interposedtherebetween and made of the semiconductor film 34, the second gateelectrode 23E disposed overlapping the channel region 23D on the upperlayer side with the second gate insulating film 35 interposedtherebetween and connected to the first gate electrode 23A, the sourceregion 23B connected to a first end portion of the channel region 23Dand the source line 27, and the drain region 23C connected to a secondend portion of the channel region 23D and the pixel electrode 24. Inthis way, when the signal transmitted to the gate line 26 is supplied tothe first gate electrode 23A and the second gate electrode 23E, the TFT23 is driven. Then, the signal transmitted to the source line 27 issupplied to the source region 23B, and is supplied from the sourceregion 23B to the drain region 23C via the channel region 23D. The drainregion 23C is connected to the pixel electrode 24, and thus the pixelelectrode 24 is charged to a potential on the basis of the signaltransmitted to the source line 27. Here, in a configuration in which aplurality of the pixel electrodes 24, a plurality of the gate lines 26,and a plurality of the source lines 27 are provided, the arrangementinterval of the plurality of the source lines 27 is greater than thearrangement interval of the plurality of the gate lines 26, and thenumber of installations of the plurality of the gate lines 26 tends tobe greater than the number of installations of the plurality of thesource lines 27. As a result, the driving time of the TFT 23 driven onthe basis of the signal supplied to the gate line 26 as well as thecharging time of the pixel electrode 24 charged by the TFT 23 tend to beshortened. In this regard, the TFT 23 is driven by the first gateelectrode 23A disposed overlapping the channel region 23D on the lowerlayer side with the first gate insulating film 33 disposed therebetween,and the second gate electrode 23E disposed overlapping the channelregion 23D on the upper layer side with the second gate insulating film35 disposed therebetween and connected to the first gate electrode 23A,making it possible to increase the current flowing into the channelregion 23D compared to when only one gate electrode is disposedoverlapping the channel region 23D. This makes it possible tosufficiently charge the pixel electrode 24 even with a short chargingtime.

Further, the source line 27 is disposed with the first interlayerinsulating film (insulating film) 37 interposed between the source line27 and the second gate electrode 23E, and is made of the third metalfilm 38, which is a conductive film different from that of the secondgate electrode 23E. In this way, compared to when the source line andthe second gate electrode are constituted by the same conductive film, adefect in which the source line 27 and the second gate electrode 23E areshort-circuited is less likely to be generated.

Further, the common electrode 25 overlapping the pixel electrode 24 withthe inter-electrode insulating film (insulating film) 43 interposedtherebetween is provided, and the light-transmitting shielding portion45 is connected to the common electrode 25. In this way, the commonelectrode 25 overlapping the pixel electrode 24 with the inter-electrodeinsulating film 43 interposed therebetween is held at a commonpotential. A potential difference is generated between the charged pixelelectrode 24 and the common electrode 25, and the display is made on thebasis of the potential difference. The light-transmitting shieldingportion 45 is connected to the common electrode 25 and is at the samepotential as the common electrode 25, and thus can favorably block anelectrical field that may be generated between the pixel electrode 24and the gate line 26.

Second Embodiment

The second embodiment of the present disclosure will be described withreference to FIG. 14 to FIG. 16. In this second embodiment, anembodiment additionally provided with a second shielding portion 47 isillustrated. Note that redundant descriptions of structures, actions,and effects similar to those of the first embodiment described abovewill be omitted.

As illustrated in FIG. 14 and FIG. 16, an array substrate 121 accordingto the present embodiment is provided with a second shielding portion 47disposed overlapping at least a portion of a light-transmittingshielding portion 145. The second shielding portion 47 is constituted bya third metal film (conductive film) 138 disposed on the upper layerside of a semiconductor film 134 constituting the light-transmittingshielding portion 145 with a first interlayer insulating film(insulating film) 137 interposed therebetween. The second shieldingportion 47 extends parallel to the light-transmitting shielding portion145, and a length dimension thereof is equivalent to a length dimensionof the light-transmitting shielding portion 145. In this way, inaddition to the light-transmitting shielding portion 145, the secondshielding portion 47 is disposed adjacent to both a pixel electrode 124and a gate line 126, and thus, even if a formation defect is generatedin the light-transmitting shielding portion 145 made of thesemiconductor film 134 for manufacturing reasons, an electrical fieldthat may be generated between the pixel electrode 124 and the gate line126 can be blocked by the second shielding portion 47 made of the thirdmetal film 138.

The second shielding portion 47, as illustrated in FIG. 14 and FIG. 16,is disposed with a portion thereof overlapping a side edge portion ofthe gate line 126 in plan view. The third metal film 138 constitutingthe second shielding portion 47 has light-blocking properties, and thusthe portion of the second shielding portion 47 overlapping the side edgeportion of the gate line 126 is referred to as a “light-blocking gateline overlapping portion (light-blocking pixel line overlapping portion)47A”. The light-blocking gate line overlapping portion 47A overlaps theside edge portion of the gate line 126 with a first gate insulating film133 and the first interlayer insulating film 137 (insulating film)interposed therebetween. The second shielding portion 47 is disposed notoverlapping the pixel electrode 124. In this way, even when there is anelectrical field that may be generated between the gate line 126 and thepixel electrode 124 near the edge portion of the gate line 126, theelectrical field can be favorably blocked by the light-blocking gateline overlapping portion 47A of the second shielding portion 47. Whilethe light-blocking gate line overlapping portion 47A overlaps the gateline 126, the second shielding portion 47 constituted by the third metalfilm 138 having light-blocking properties does not overlap the pixelelectrode 124, and thus a decrease in the amount of transmitted light ofthe pixel electrode 124 is avoided. Further, even when, for example, thesecond shielding portion 47 is positionally offset away from the gateline 126 due to a shift in alignment that is generated duringmanufacture or the like, the light-blocking gate line overlappingportion 47A can block an electrical field that may be generated in thespace opened between the pixel electrode 124 and the gate line 126.

In contrast, similar to the first embodiment described above, thelight-transmitting shielding portion 145, as illustrated in FIG. 15 andFIG. 16, is disposed with portions thereof respectively overlapping theside edge portion on the longitudinal side of the pixel electrode 124and the side edge portion of the gate line 126. The semiconductor film134 constituting the light-transmitting shielding portion 145 haslight-transmitting and thus the portion of the light-transmittingshielding portion 145 overlapping the side edge portion on thelongitudinal side of the pixel electrode 124 is referred to as a“light-transmitting pixel electrode overlapping portion 145B”, and theportion overlapping the side edge portion of the gate line 126 isreferred to as a “light-transmitting gate line overlapping portion(light-transmitting pixel line overlapping portion) 145C”. Thislight-transmitting pixel electrode overlapping portion 145B is the sameas the pixel electrode overlapping portion 45B described in the firstembodiment described above, and the light-transmitting gate lineoverlapping portion 145C is the same as the gate line overlappingportion 45C described in the first embodiment described above. Thelight-transmitting pixel electrode overlapping portion 145B overlaps theside edge portion on the longitudinal side of the pixel electrode 124with the first interlayer insulating film 137, a second interlayerinsulating film 139, and a flattening film 140 (insulating film)interposed therebetween. Further, the light-transmitting gate lineoverlapping portion 145C overlaps the side edge portion of the gate line126 with the first gate insulating film 133 interposed therebetween. Inthis way, even when there is an electrical field that may be generatedbetween the pixel electrode 124 and the gate line 126 near the edgeportion of the pixel electrode 124, the electrical field can befavorably blocked by the light-transmitting pixel electrode overlappingportion 145B of the light-transmitting shielding portion 145. Moreover,because the light-transmitting shielding portion 145 haslight-transmitting, the amount of transmitted light of the pixelelectrode 124 is less likely to decrease and luminance reduction issuppressed even when the light-transmitting pixel electrode overlappingportion 145B overlaps the pixel electrode 124. Further, even when, forexample, the light-transmitting shielding portion 145 is positionallyoffset away from the pixel electrode 124 due to a shift in alignmentthat is generated during manufacture or the like, the light-transmittingpixel electrode overlapping portion 145B can block an electrical fieldthat may be generated in the space opened between the pixel electrode124 and the gate line 126. Further, the light-transmitting gate lineoverlapping portion 145C is disposed overlapping the side edge portionof the gate line 126 in addition to the light-blocking gate lineoverlapping portion 47A of the second shielding portion 47, making itpossible to more favorably block an electrical field that may begenerated near the side edge portion of the gate line 126.

As illustrated in FIG. 14, the third metal film 138 constituting thesecond shielding portion 47 also constitutes an intermediate electrode146. Then, the second shielding portion 47 is directly coupled to theintermediate electrode 146. Specifically, of the second shieldingportion 47 extending in parallel with the light-transmitting shieldingportion 145, an end portion on the side (right side illustrated in FIG.14) opposite to the TFT 123 side in the length direction (X-axisdirection) of the second shielding portion 47 is coupled to theintermediate electrode 146. The intermediate electrode 146, as describedin the first embodiment described above, is connected to both a commonelectrode 125 and the light-transmitting shielding portion 145, makingit possible to achieve effects such as a less likelihood of failure suchas film breakage or the like in the common electrode 125 compared towhen the common electrode is directly connected to thelight-transmitting shielding portion 145, resulting in high connectionreliability. Note that a connection structure of the intermediateelectrode 146, the common electrode 125, and the light-transmittingshielding portion 145 (first shielding portion contact hole CH5 andsecond shielding portion contact hole CH6) is as set forth in FIG. 13illustrated in first embodiment described above. Then, in the presentembodiment, the second shielding portion 47 is connected to the commonelectrode 125 by interposing the intermediate electrode 146 along withthe light-transmitting shielding portion 145, and thus the number offilms can be reduced compared to when the second shielding portion andthe intermediate electrode are constituted by different conductivefilms.

As described above, according to the present embodiment, the secondshielding portion 47 made of the third metal film (conductive film) 138disposed with at least a portion thereof overlapping thelight-transmitting shielding portion 145 with the first interlayerinsulating film (insulating film) 137 interposed therebetween isprovided. In this way, even in a case where a formation defect isgenerated in the light-transmitting shielding portion 145 formanufacturing reasons, at least a portion of the second shieldingportion 47 made of the third metal film 138 is disposed overlapping thelight-transmitting shielding portion 145 with the first interlayerinsulating film 137 interposed therebetween, making it possible tomaintain the electrical field blocking function.

Further, the second shielding portion 47, in addition to beingconstituted by the third metal film 138 having light-blockingproperties, includes a light-blocking gate line overlapping portion(light-blocking pixel line overlapping portion) 47A overlapping an edgeportion of the gate line 126 with the first gate insulating film 133 andthe first interlayer insulating film 137 (insulating film) interposedtherebetween, and the light-transmitting shielding portion 145 includesa light-transmitting pixel electrode overlapping portion 145Boverlapping an edge portion of the pixel electrode 124 with the firstinterlayer insulating film 137, the second interlayer insulating film139, and the flattening film 140 (insulating film) interposedtherebetween. In this way, while there is an electrical field generatedbetween the pixel electrode 124 and the gate line 126 near the edgeportion of the pixel electrode 124, the electrical field can befavorably blocked by the light-transmitting pixel electrode overlappingportion 145B of the light-transmitting shielding portion 145. Moreover,because the light-transmitting shielding portion 145 haslight-transmitting, the amount of transmitted light of the pixelelectrode 124 is less likely to decrease and luminance reduction issuppressed even when the light-transmitting pixel electrode overlappingportion 145B overlaps the pixel electrode 124 with the first interlayerinsulating film 137, the second interlayer insulating film 139, and theflattening film 140 interposed therebetween. Further, even when, forexample, the light-transmitting shielding portion 145 is positionallyoffset away from the pixel electrode 124 due to a shift in alignmentthat is generated during manufacture or the like, the light-transmittingpixel electrode overlapping portion 145B can block an electrical fieldthat may be generated in the space opened between the pixel electrode124 and the gate line 126. On the other hand, while there is anelectrical field generated between the gate line 126 and the pixelelectrode 124 near the edge portion of the gate line 126, the electricalfield can be favorably blocked by the light-blocking gate lineoverlapping portion 47A of the second shielding portion 47. While thelight-blocking gate line overlapping portion 47A overlaps the gate line126, the second shielding portion 47 constituted by the third metal film138 having light-blocking properties does not overlap the pixelelectrode 124, and thus a decrease in the amount of transmitted light ofthe pixel electrode 124 is avoided. Further, even when, for example, thesecond shielding portion 47 is positionally offset away from the gateline 126 due to a shift in alignment that is generated duringmanufacture or the like, the light-blocking gate line overlappingportion 47A can block an electrical field that may be generated in thespace opened between the pixel electrode 124 and the gate line 126. As aresult, the reliability of blocking an electrical field that may begenerated between the pixel electrode 124 and the gate line 126 by thelight-transmitting shielding portion 145 and the second shieldingportion 47 is increased.

Further, the common electrode 125 overlapping the pixel electrode 124with the inter-electrode insulating film (insulating film) 143interposed therebetween, and the intermediate electrode 146 disposedoverlapping the common electrode 125 and the light-transmittingshielding portion 145, each with a different insulating film of thefirst interlayer insulating film 137, the second interlayer insulatingfilm 139, the flattening film 140, and the inter-electrode insulatingfilm 143 interposed therebetween, and connected to each of the commonelectrode 125 and the light-transmitting shielding portion 145 throughthe first shielding portion contact hole CH5 and the second shieldingportion contact hole CH6 (contact hole) formed in each of the firstinterlayer insulating film 137, the second interlayer insulating film139, the flattening film 140, and the inter-electrode insulating film143 are provided. The second shielding portion 47 is made of the thirdmetal film 138, which is the conductive film same as that of theintermediate electrode 146, and is coupled to the intermediate electrode146. In this way, the common electrode 125 overlapping the pixelelectrode 124 with the inter-electrode insulating film 143 interposedtherebetween is held at a common potential. A potential difference isgenerated between the charged pixel electrode 124 and the commonelectrode 125, and the display is made on the basis of the potentialdifference. The first shielding portion contact hole CH5 and the secondshielding portion contact hole CH6 are respectively formed in the secondinterlayer insulating film 139, the flattening film 140, and theinter-electrode insulating film 143, which are insulating filmsinterposed between the common electrode 125 and the intermediateelectrode 146, and in the first interlayer insulating film 137, which isan insulating film interposed between the intermediate electrode 146 andthe light-transmitting shielding portion 145, and thus the commonelectrode 125 and the light-transmitting shielding portion 145 areconnected to the intermediate electrode 146 through the first shieldingportion contact hole CH5 and the second shielding portion contact holeCH6. That is, the common electrode 125 and the light-transmittingshielding portion 145 are connected via this intermediate electrode 146and thus, compared to when the common electrode is directly connected tothe light-transmitting shielding portion 145, failure such as filmbreakage or the like is not readily generated in the common electrode125, resulting in high connection reliability. In addition, the secondshielding portion 47 includes the third metal film 138, which is theconductive film same as that of the intermediate electrode 146, and iscoupled to the intermediate electrode 146, and thus, is connected to thecommon electrode 125 by interposing the intermediate electrode 146 alongwith the light-transmitting shielding portion 145. Compared to when thesecond shielding portion and the intermediate electrode are constitutedby different conductive films, the number of films can be reduced.

Third Embodiment

The third embodiment of the present invention will be described withreference to FIG. 17 to FIG. 19. In this third embodiment, aconfiguration of a source line 227 is changed from that of the firstembodiment described above. Note that redundant descriptions ofstructures, actions, and effects similar to those of the firstembodiment described above will be omitted.

The source line 227 according to the present embodiment, as illustratedin FIG. 17, is formed of a second metal film 236 that is the same asthat of a second gate electrode 223E. Accordingly, in the presentembodiment, the third metal film 38 constituting the source line 27 inthe first embodiment described above is omitted, and the firstinterlayer insulating film 37 disposed on the lower layer side of thethird metal film 38 is omitted. A second gate insulating film 235disposed on the lower layer side of the second metal film 236constituting the source line 227 is patterned along with the secondmetal film 236, as described in the first embodiment described above.Therefore, on the lower layer side of the source line 227, asillustrated in FIG. 18 and FIG. 19, the second gate insulating film 235is disposed overlapping substantially the entire region, excluding thegate contact hole CH4. Further, the source contact hole CH3 connecting asource line widened portion 227A of the source line 227 made of thesecond metal film 236 and a source region 223B made of a semiconductorfilm 234 is formed in the second gate insulating film 235 interposedbetween the semiconductor film 234 and the second metal film 236, asillustrated in FIG. 18. Further, with the third metal film 38 describedin the first embodiment omitted, a pixel intermediate electrode 231 andan intermediate electrode 246 are constituted by the second metal film236 same as that of the second gate electrode 223E and the source line227, as illustrated in FIG. 17.

As described above, according to the present embodiment, the source line227 is made of the second metal film 236 that is the conductive filmsame as that of the second gate electrode 223E. In this way, compared towhen the source line and the second gate electrode are constituted bydifferent conductive films, the number of films can be reduced.

Other Embodiments

The present disclosure is not limited to the embodiments described aboveand illustrated by the drawings, and embodiments such as those describedbelow are also included within the technical scope of the presentdisclosure.

(1) While, in each of the embodiments described above, a configurationhas been illustrated in which the light-transmitting shielding portionincludes the pixel electrode overlapping portion (light-transmittingpixel electrode overlapping portion) overlapping the pixel electrode,the configuration may be one in which the light-transmitting shieldingportion is disposed not overlapping the pixel electrode and the pixelelectrode overlapping portion (light-transmitting pixel electrodeoverlapping portion) is not included.

(2) While, in each of the embodiments described above, a configurationhas been illustrated in which the light-transmitting shielding portionincludes the gate line overlapping portion (light-transmitting gate lineoverlapping portion) overlapping the gate line, the configuration may beone in which the light-transmitting shielding portion is disposed notoverlapping the gate line and the gate line overlapping portion(light-transmitting gate line overlapping portion) is not included. Inparticular, as in the second embodiment described above, as long as theconfiguration includes the second shielding portion overlapping the gateline, even if the light-transmitting gate line overlapping portion isomitted, an electrical field that may be generated near the side edgeportion of the gate line can be blocked by the light-blocking gate lineoverlapping portion of the second shielding portion.

(3) While, in each of the embodiments described above, a configurationhas been illustrated in which the light-transmitting shielding portionincludes the non-overlapping portion, the pixel electrode overlappingportion, and the gate line overlapping portion, the light-transmittingshielding portion may not include the pixel electrode overlappingportion and the gate line overlapping portion and only include thenon-overlapping portion. Conversely, the light-transmitting shieldingportion may not include the non-overlapping portion and may include atleast one of the pixel electrode overlapping portion and the gate lineoverlapping portion. When the light-transmitting shielding portion doesnot include the non-overlapping portion, a configuration in which theinterval between the gate line and the pixel electrode is substantiallynot formed is possible.

(4) While, in the second embodiment described above, a case has beenillustrated in which the second shielding portion includes thelight-blocking gate line overlapping portion overlapping the gate linebut the second shielding portion is disposed not overlapping the pixelelectrode, the second shielding portion may further include alight-blocking pixel electrode overlapping portion overlapping the pixelelectrode in addition to the light-blocking gate line overlappingportion.

(5) While, in each of the embodiments described above, a case has beenillustrated in which the light-transmitting shielding portion and thecommon line are connected to the common electrode by differentconnection structures, the configuration may be one in which thelight-transmitting shielding portion is connected to the common line andthe light-transmitting shielding portion is not directly connected tothe common electrode, that is, a configuration in which thelight-transmitting shielding portion is connected to the commonelectrode by interposing the common line. Even in this case, the commonpotential transmitted by the common line is supplied to each of thelight-transmitting shielding portion and the common electrode.

(6) In addition to the embodiments described above, a formation rangeand the like of the light-transmitting shielding portion in plan viewcan be changed as appropriate. Further, the formation range and the likeof the second shielding portion, in plan view, described in the secondembodiment can be changed as appropriate.

(7) While, in each of the embodiments described above, a case has beendescribed in which the light-transmitting shielding portion isconstituted by a reduced resistance region of the semiconductor film,the light-transmitting shielding portion may be constituted by atransparent electrode film, for example, as a conductive film havinglight-transmitting. In this case, the transparent electrode film isadded separately from the first transparent electrode film constitutingthe pixel electrode and the second transparent electrode filmconstituting the common electrode, and the transparent electrode filmmay be disposed on the upper layer side of the first metal filmconstituting the gate line and on the lower layer side of the firsttransparent electrode film constituting the pixel electrode.

(8) In addition to the embodiments described above, the specific planarshape of the pixel electrode can be changed as appropriate. For example,the shape may be a planar shape in which the pixel electrode is bent soas to include a plurality of bent portions. Further, the planar shape ofthe pixel electrode including one bent portion may be different fromthat illustrated in each of the drawings and, for example, the bentportion may be disposed at a position other than the central position inthe longitudinal direction of the pixel electrode. In addition, thepixel electrode may have a shape without a bent portion (for example, arectangular shape or the like). Further, the pixel electrode may have aplanar shape (such as a square) that is not a longitudinal shape.

(9) While, in each of the embodiments described above, a case has beenillustrated in which the ratio of the longitudinal dimension to theshort-hand dimension of the pixel electrode is three, it is alsopossible to change the ratio of the longitudinal dimension to theshort-side dimension of the pixel electrode to a value other than three.For example, when the color filters aligned in the Y-axis direction arefour colors (e.g., white in addition to R, G, and B), the ratio of thelongitudinal dimension to the short-side dimension of the pixelelectrode may be four.

(10) In addition to the embodiments described above, the specificrouting paths of the source line and the gate line can be changed asappropriate. Similarly, the specific routing paths of the common linecan be changed as appropriate.

(11) While, in each of the embodiments described above, the number ofinstallations of the gate lines is equal to the arranged number of pixelelectrodes in the Y-axis direction, and the number of installations ofthe source lines is equal to the arranged number of pixel electrodes inthe X-axis direction, the number of installations of the gate lines inthe liquid crystal panel may be twice the arranged number of pixelelectrodes in the Y-axis direction, and the number of the source linesmay be half the arranged number of pixel electrodes in the X-axisdirection.

(12) While, in each of the embodiments described above, a TFT having adouble-gate structure in which the first gate electrode and the secondgate electrode are respectively disposed on the lower layer side and onthe upper layer side of the channel region, the TFT may have a singlegate structure in which the gate electrode is selectively disposed onthe lower layer side or the upper layer side of the channel region. In aTFT of a top gate type in which the pixel electrode is disposed on theupper layer side of the channel region, it is also possible to removethe first metal film illustrated in each of the embodiments andconfigure the gate line with the second metal film. In this case, thelight-transmitting shielding portion is preferably disposed notoverlapping the gate line. On the other hand, in a TFT of a bottom gatetype in which the pixel electrode is disposed on the lower layer side ofthe channel region, it is also possible to omit the second metal film orthe third metal film illustrated in each of the embodiments. In thiscase, the source line, the pixel intermediate electrode, and theintermediate electrode may be configured by the second metal film or thethird metal film, whichever one is not omitted.

(13) In addition to each of the embodiments described above, thespecific screen size, resolution, and the like of the liquid crystalpanel can be changed as appropriate.

(14) In addition to each of the embodiments described above, thespecific arrangement pitch of the pixel portions in the liquid crystalpanel can be changed as appropriate.

(15) While, in each of the embodiments described above, a case has beenillustrated in which four drivers are mounted to the array substrate,the number of drivers mounted to the array substrate can be changed asappropriate.

(16) While, in each of the embodiments described above, a case has beenillustrated in which the driver is Chip-on-Glass (COG) mounted directlyto the array substrate, a flexible substrate on which the driver ischip-on-film (COF) mounted may be connected to the array substrate.

(17) While, in each of the embodiments described above, the gate circuitportion is provided to the array substrate, the gate circuit portion maybe omitted, and a gate driver having a function similar to that of thegate circuit portion may be mounted to the array substrate. Further, itis also possible to provide a gate circuit portion to only one sideportion on one side of the array substrate.

(18) In addition to the embodiments described above, the specific planarshape of the pixel overlapping opening provided to the common electrodecan be changed as appropriate. The planar shape of the pixel overlappingopening can be, for example, a W-shape, a straight line, or the like.Further, the specific number of installations, arrangement pitch, andthe like of the pixel overlapping opening can be changed as appropriate.

(19) While, in each of the embodiments described above, a case has beenillustrated in which the pixel overlapping opening is provided to thecommon electrode, conversely a common electrode overlapping opening maybe provided to the pixel electrode. Further, it is also possible to makethe common electrode be made of the first transparent electrode film andthe pixel electrode be made of the second transparent electrode film.

(20) While, in each of the embodiments described above, a case has beenillustrated in which the TFT is disposed in a planar manner in a matrixshape in the array substrate, the TFT may be disposed in a planar mannerin a zigzag shape.

(21) While, in each of the embodiments described above, a case has beenillustrated in which the black matrix (inter-pixel light blockingportion) is provided to the CF substrate side, the black matrix(inter-pixel light blocking portion) may be provided on the arraysubstrate side.

(22) In addition to each of the embodiments described above, thesemiconductor film constituting the channel portion of the TFT may bepolysilicon. In this case, when a single gate structure is adopted, itis preferable that the TFT be a bottom gate type or a top gate typeincluding a light-blocking film at a lower layer of the channel portion(the side on which the backlight device is installed).

(23) In addition to the embodiments described above, the display mode ofthe liquid crystal panel may be vertical alignment (VA) mode, twistednematic (TN) mode, in-plane switch (IPS) mode, or the like.

(24) While, in each of the embodiments described above, a liquid crystalpanel without a built-in touch panel pattern that exhibits positiondetection functions is illustrated, the liquid crystal panel may be anin-cell type with a built-in touch panel pattern that exhibits aposition detection function.

(25) While, in each of the embodiments described above, a liquid crystaldisplay device including a transmissive liquid crystal panel isexemplified, the liquid crystal display device may be one that includesa reflective liquid crystal panel or a semi-transmissive liquid crystalpanel.

(26) While, in each of the embodiments described above, a case has beenillustrated in which the planar shape of the liquid crystal displaydevice (liquid crystal panel or backlight device) is a horizontallyelongated rectangular shape, the planar shape of the liquid crystaldisplay device may be a longitudinally elongated rectangular shape, asquare shape, a circular shape, a semi-circular shape, an ellipticalshape, an oblong shape, a trapezoidal shape, or the like.

While there have been described what are at present considered to becertain embodiments of the invention, it will be understood that variousmodifications may be made thereto, and it is intended that the appendedclaim cover all such modifications as fall within the true spirit andscope of the invention.

What is claimed is:
 1. A display device comprising: a pixel electrode; aswitching element connected to the pixel electrode; a pixel lineconnected to the switching element and disposed adjacent to the pixelelectrode; and a light-transmitting shielding portion made of aconductive film having light-transmitting, and disposed adjacent to boththe pixel electrode and the pixel line.
 2. The display device accordingto claim 1, wherein the switching element includes at least a channelregion made of a portion of a semiconductor film, and thelight-transmitting shielding portion is formed by reducing a resistanceof a portion of the semiconductor film, the portion being different fromthe channel region.
 3. The display device according to claim 1, whereinthe pixel line is disposed aligned with the pixel electrode with aninterval between the pixel line and the pixel electrode, and thelight-transmitting shielding portion includes a non-overlapping portioninterposed between and not overlapping the pixel electrode and the pixelline in an alignment direction of the pixel electrode and the pixelline.
 4. The display device according to claim 1, wherein thelight-transmitting shielding portion includes a pixel electrodeoverlapping portion overlapping an edge portion of the pixel electrodewith an insulating film interposed between the pixel electrodeoverlapping portion and the edge portion of the pixel electrode.
 5. Thedisplay device according to claim 1, wherein the light-transmittingshielding portion includes a pixel line overlapping portion overlappingan edge portion of the pixel line with an insulating film interposedbetween the pixel line overlapping portion and the edge portion of thepixel line.
 6. The display device according to claim 5, wherein theswitching element includes at least a channel region made of a portionof a semiconductor film disposed on an upper layer side of the pixelline with an insulating film interposed between the channel region andthe pixel line, and the light-transmitting shielding portion is formedby reducing a resistance of a portion of the semiconductor film, theportion being different from the channel region.
 7. The display deviceaccording to claim 1, wherein the pixel electrode has a longitudinalshape, and the pixel line and the light-transmitting shielding portionextend along an edge portion on a longitudinal side of the pixelelectrode.
 8. The display device according to claim 7, wherein the pixelelectrode includes a bent portion at a middle of the pixel electrode ina longitudinal direction, and the pixel line and the light-transmittingshielding portion are bent along the bent portion.
 9. The display deviceaccording to claim 7, further comprising: a second pixel line extendingin a short-hand direction of the pixel electrode, wherein the switchingelement includes a first gate electrode connected to the pixel line, achannel region disposed overlapping the first gate electrode on an upperlayer side with a first gate insulating film interposed between thechannel region and the first gate electrode and made of a semiconductorfilm, a second gate electrode disposed overlapping the channel region onan upper layer side with the second gate insulating film interposedbetween the second gate electrode and the channel region, and connectedto the first gate electrode, a source region connected to a first endportion of the channel region and the second pixel line, and a drainregion connected to a second end portion of the channel region and thepixel electrode.
 10. The display device according to claim 9, whereinthe second pixel line is disposed with an insulating film interposedbetween the second pixel line and the second gate electrode, and is madeof a conductive film different from that of the second gate electrode.11. The display device according to claim 9, wherein the second pixelline is made of the conductive film same as that of the second gateelectrode.
 12. The display device according to claim 1, furthercomprising: a common electrode overlapping the pixel electrode with aninsulating film interposed between the common electrode and the pixelelectrode, wherein the light-transmitting shielding portion is connectedto the common electrode.
 13. The display device according to claim 1,further comprising: a second shielding portion disposed at least partlyoverlapping the light-transmitting shielding portion with an insulatingfilm interposed between the second shielding portion and thelight-transmitting shielding portion, and made of a conductive film. 14.The display device according to claim 13, wherein the second shieldingportion is constituted by a conductive film having light-blockingproperties, and includes a light-blocking pixel line overlapping portionoverlapping an edge portion of the pixel line with an insulating filminterposed between the light-blocking pixel line overlapping portion andthe edge portion of the pixel line, and the light-transmitting shieldingportion includes a light-transmitting pixel electrode overlappingportion overlapping an edge portion of the pixel electrode with aninsulating film interposed between the light-transmitting pixelelectrode overlapping portion and the edge portion of the pixelelectrode.
 15. The display device according to claim 13, furthercomprising: a common electrode overlapping the pixel electrode with aninsulating film interposed between the common electrode and the pixelelectrode; and an intermediate electrode disposed overlapping the commonelectrode and the light-transmitting shielding portion via differentinsulating films and connected to each of the common electrode and thelight-transmitting shielding portion through a contact hole formed ineach of the insulating films, wherein the second shielding portion ismade of the conductive film same as that of the intermediate electrode,and is coupled to the intermediate electrode.